Job Details
- Status
- Active
- Category
- Posted
- Jun 17, 2026
- Expires
- Sep 15, 2026
- Work style
- On-site
About the Role
Overview
Support a balance of sustaining, optimization, and qualification of wafer fabrication processes, including etch, and deposition and photolithography. These processes are applied to both existing and new technology generations of Nokia’s InP based Photonic Integrated Circuits (PICs).
Role
Job Family Description
Support a balance of sustaining, optimization, and qualification of wafer fabrication processes, including etch, and deposition and photolithography. These processes are applied to both existing and new technology generations of Nokia’s InP based Photonic Integrated Circuits (PICs).
About The Company
Nokia is a global leader in connectivity for the AI era. With expertise across fixed, mobile and transport networks, powered by the innovation of Nokia Bell Labs, we’re advancing connectivity to secure a brighter world.
Our recruitment process
We act inclusively and respect the uniqueness of people. Our employment decisions are made regardless of race, color, national or ethnic origin, religion, gender, sexual orientation, gender identity or expression, age, marital status, disability, protected veteran status or other characteristics protected by law. We are committed to a culture of inclusion built upon our core value of respect.
If you’re interested in this role but don’t meet every listed requirement, we still encourage you to apply. Unique backgrounds, perspectives, and experiences enrich our teams, and you may be just the right candidate for this or another opportunity.
The length of the recruitment process may vary depending on the specific role's requirements. We strive to ensure a smooth and inclusive experience for all candidates. Discover more about the recruitment process at Nokia.
About The Team
- Corporate Retirement Savings Plan
- Health and dental benefits
- Short-term disability, and long-term disability
- Life insurance, and AD&D – Company paid 2x base pay
- Optional or Supplemental life and AD&D insurance (Employee/Spouse/Child)
- Paid time off for holidays and Vacation
- Employee Stock Purchase Plan
- Tuition Assistance Plan
- Adoption assistance
- Employee Assistance Program/Work Life Resource Program
Responsibilities
Assist process engineers in the development of wafer process recipes, operational procedures, and provide other support needed to qualify new tools needed for the release of an additional PIC wafer manufacturing site.
Collect, interpret, and respond to wafer fab statistical process control (SPC) data in the etch, deposition, and photolithography modules.
Support the wafer fab engineering and operations teams to develop, control and optimize wafer fabrication processes
Work in teams to scale PIC wafer fabrication processes to larger wafer sizes, while meeting key objectives for PIC yield, uniformity, and end-of-line parametric performance.
Troubleshoot wafer fabrication process problems to enable a smooth flow of production and development wafers in the fab. Support engineering process and tool owners in resolving fab process or equipment problems at 2 bay area manufacturing sites.
Assist process engineers in utilizing metrology equipment and test structures to maintain process control across wafer fab process modules, improve production yield and enable and guide new process development.
Requirements
JMP, DOE, SPC and similar data analysis tools and their application to semiconductor manufacturing
Working knowledge of semiconductor fabrication processes, and expertise in etch, deposition, photolithography and related processes.
Strong initiative and communication skills.
Experience with semiconductor process development, sustaining, new process introduction, and ramp to volume.
Experience supporting a 24x7 fab operations team, writing and training of fab procedures, root cause analysis and problem resolution.
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